1. 2015 Paul Caspi Memorial Dissertation Award

    The winner of the 2015 award is Marco Zimmerling for his thesis "End-to-end Predictability and Efficiency in Low-power Wireless Networks," which he completed at ETH Zurich.

    The Paul Caspi Memorial Dissertation Award has been established in 2013 in memory of Dr. Paul Caspi (1944-2012). The award recognizes outstanding doctoral dissertations that significantly advance the state of the art in the science of embedded systems. The winner was selected by a committee, chaired by Prof. Wang Yi. 7 nominations for the award have been received from Germany, Sweden, Switzerland, and USA.
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  2. RAW 2016 - Call for Participation
    =========================
    23rd Reconfigurable Architectures Workshop
    May 23-24, 2016
    Chicago, Illinois USA

    Website: http://raw.necst.it/

    Advance Program:
    May 23, 2016:
    - Keynote speech: Reconfigurable Accelerators for Big Data and Cloud
      Speaker: Peter Hofstee - IBM, Austin, TX, USA
    - Social Event Sponsor: TOPIC Embedded Products

    May 24, 2016:
    - Keynote speech
      Speaker: Patrick Lysaght - Xilinx, San Jose, CA, USA
    - Keynote speech: Why the application development on Systems-on-Chip demands a next level programming model
      Speaker: Dirk van den Heuvel - TOPIC Embedded Products, Eindhoven, the Netherlands

    Overview:
    The 23rd Reconfigurable Architectures Workshop (RAW 2016) will be held in Chicago, Illinois USA in May 2016. RAW 2016 is associated with the 30th IEEE International Parallel & Distributed Processing Symposium (IPDPS 2016) and is sponsored by the IEEE Computer Society Technical Committee on Parallel Processing. The workshop is one of the major meetings for researchers to present ideas, results, and on-going research on both theoretical and practical advances in Reconfigurable Computing.

    A reconfigurable computing environment is characterized by the ability of underlying hardware architectures or devices to rapidly alter (often on the fly) the functionalities of their components and the interconnection between them to suit the problem at hand. The area has a rich theoretical tradition and wide practical applicability. There are several commercially available reconfigurable platforms (FPGAs and coarse-grained devices) and many modern applications (including embedded systems and HPC) use reconfigurable subsystems. An appropriate mix of theoretical foundations and practical considerations, including algorithms architectures, applications, technologies and tools, is essential to fully exploit the possibilities offered by reconfigurable computing. The Reconfigurable Architectures Workshop aims to provide a forum for creative and productive interaction for researchers and practitioners in the area.

    Topics of interest include, but are not limited to:
    Architectures & Algorithms
    · Theoretical Interconnect and Computation Models
    · Algorithmic Techniques and Mapping
    · Run-Time Reconfiguration Models and Architectures
    · Emerging Technologies (optical models, 3D Interconnects, devices)
    · Bounds and Complexity Issues
    · Analog Arrays

    Reconfigurable Systems & Applications
    · Reconfigurable Accelerators (HPC, Bioinformatics, Acceleration Applications in Finance, Data Mining, Big Data, and Analytics)
    · Embedded systems and Domain-Specific solutions (Digital Media, Gaming, Automotive applications)
    · FPGA-based MPSoC and Multicore
    · Distributed Systems and Networks
    · Wireless and Mobile Systems
    · Emerging applications (Organic Computing, Biology-Inspired Solutions)
    · Critical issues (Security, Energy efficiency, Fault-Tolerance)

    Software & Tools
    · Operating Systems and High Level Synthesis
    · High-Level Design Methods (Hardware/Software Co-design, Compilers)
    · System Support (Soft Processor Programming)
    · Runtime Support
    · Reconfiguration Techniques (Reusable Artifacts)
    · Simulations and Prototyping (Performance Analysis, Verification Tools)
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  3. -------------------------------------------------------------------------
    Call for Papers, Tutorials, Workshops
    -------------------------------------------------------------------------
    
    E M B E D D E D    S Y S T E M S    W E E K
    
    Pittsburgh, PA, US, October 2-7, 2016
    www.esweek.org
    
    =========================================================================
             ++  CASES  ++  CODES+ISSS  ++  EMSOFT  ++  IoT Day  ++
                 ++  Symposia  ++  Workshops  ++  Tutorials  ++
    =========================================================================
    
    -------------------------------------------------------------------------
    Embedded Systems Week is . . .
    -------------------------------------------------------------------------
    ESWeek is the premier event covering all aspects of embedded systems
    and software. By bringing together three leading conferences (CASES,
    CODES+ISSS, and EMSOFT), a special IoT Day, several symposia (like
    ESTIMedia, RSP), and hot-topic workshops and tutorials, ESWeek presents
    attendees a wide range of topics unveiling the state of the art in
    embedded systems design and HW/SW architectures.
    http://esweek.org/documents/2016/esweek_flyer.pdf
    Registered attendees are entitled to attend sessions of all
    conference CASES, CODES+ISSS, EMSOFT, and the IoT Day.
    Symposia, workshops and tutorials require separate registration.
    
    -------------------------------------------------------------------------
    Timeline
    -------------------------------------------------------------------------
    - Abstract Submission:                    April 1, 2016
    - Full Paper Submission:                  April 8, 2016 (Firm Deadline!)
    - Workshop & Tutorial Proposals:          April 8, 2016
    - Notification of Final Acceptance:       April 8, 2016
    - Conference:                             October 2-7, 2016
    
    -------------------------------------------------------------------------
    CASES: International Conference on Compilers, Architecture,
           and Synthesis for Embedded Systems
    -------------------------------------------------------------------------
    CASES is a forum where researchers, developers and practitioners exchange
    information on the latest advances in compilers and architectures for
    high performance embedded systems. In addition to our core areas of
    technical interest including embedded system architectures, compilers and
    embedded systems software, memory architectures, architectures targeting
    power, reliability and security, and emerging application domains, we
    especially encourage papers that address architectural synthesis and
    compiler techniques for heterogeneous and accelerator-rich architectures.
    http://esweek.org/documents/2016/cases_cfp.pdf
    
    CASES Program Chairs:
    Siddharth Garg, NYU Polytechnic School of Engineering, US
    Laura Pozzi, University of Lugano, CH
    
    -------------------------------------------------------------------------
    CODES+ISSS: International Conference on Hardware/Software Codesign
                and System Synthesis
    -------------------------------------------------------------------------
    The International Conference on Hardware/Software Codesign and System
    Synthesis is the premier event in system-level design, modeling,
    analysis, and implementation of modern embedded and cyber-physical
    systems, from system-level specification and optimization down to system
    synthesis of multi-processor hardware/software implementations. The
    conference is a forum bringing together academic research and industrial
    practice for all aspects related to system-level and hardware/software
    co-design. High-quality original papers will be accepted for oral
    presentation followed by interactive poster sessions.
    http://esweek.org/documents/2016/codes_cfp.pdf
    
    CODES+ISSS Program Chairs:
    Andreas Gerstlauer, University of Texas at Austin, US
    Andy Pimentel, University of Amsterdam, NL
    
    -------------------------------------------------------------------------
    EMSOFT: International Conference on Embedded Software
    -------------------------------------------------------------------------
    The ACM SIGBED International Conference on Embedded Software (EMSOFT)
    brings together researchers and developers from academia, industry, and
    government to advance the science, engineering, and technology of
    embedded software development. Since 2001, EMSOFT has been the premier
    venue for cutting-edge research in the design and analysis of software
    that interacts with physical processes, with a long-standing tradition
    for results on cyber-physical systems, which compose computation,
    networking, and physical dynamics.
    http://esweek.org/documents/2016/emsoft_cfp.pdf
    
    EMSOFT Program Chairs:
    Petru Eles, Linkoping University, SE
    Rahul Mangharam, University of Pennsylvania, US
    
    -------------------------------------------------------------------------
    IoT Day: Internet of Things: A Holistic Perspective
    (IoT Day is part of CODES+ISSS)
    -------------------------------------------------------------------------
    Recent advances have led to a vision of a future Internet that connects
    diverse physical entities, ranging from commonplace household appliances
    to smart city Infrastructure. This Internet of Things brings challenges
    in research areas including cyber-physical systems, networked sensing,
    wireless networking, and cloud computing. The IoT Day is designed as a
    meeting point for researchers with the purpose of exchanging examples
    of relevant domain challenges and identifying new and exciting
    interdisciplinary research directions via a combination of contributed
    and invited papers, talks and panels.
    http://esweek.org/documents/2016/iot_cfp.pdf
    
    IoT Day Program Chairs:
    Tarek Abdelzaher, University of Illinois, USA
    Jeff Kephart, IBM Research, USA
    
    -------------------------------------------------------------------------
    Paper Process
    -------------------------------------------------------------------------
    This year ESWeek will introduce a two-stage review process in order
    to further increase quality. Papers passing the first stage of reviews
    will be asked to revise their work based on reviewer comments within a
    short time frame of around two weeks. Revised papers will then enter a
    second stage of reviews to decide on final ac-ceptance. For details,
    see http://esweek.org/author-information
    
    -------------------------------------------------------------------------
    Call for Tutorial Proposals
    -------------------------------------------------------------------------
    ESWeek 2016 is looking for high-quality, timely tutorials to enrich its
    technical program. Tutorials offer a unique opportunity where presenters
    can interact closely with attendees and attendees can gain in-depth
    knowledge on a specific topic. Tutorials on all topics related to
    embedded system design, analysis and development are welcome. ESWeek 2016
    tutorials will take place on Oct 2nd, and can be either be half day or
    full day, lecture style or hands on labs. We invite you to submit tutorial
    proposals before the deadline of April 8, 2016.
    http://esweek.org/documents/2016/tutorial_workshop_cfp.pdf
    
    Tutorials Chair:
    Sharon Hu, University of Notre Dame, US
    
    -------------------------------------------------------------------------
    Call for Workshop Proposals
    -------------------------------------------------------------------------
    ESWeek 2016 will host several workshops on Oct. 6/7 and is soliciting
    proposals for new and recurring workshops. ESWeek workshops are
    excellent opportunities to bring together researchers and practitioners
    from different communities to share their experiences in an interactive
    atmosphere and to foster collaboration for new and innovative projects.
    We invite you to submit workshop proposals on any topic related to the
    broad set of research, education, and application areas in embedded systems.
    http://esweek.org/documents/2016/tutorial_workshop_cfp.pdf
    
    Workshop Chair:
    Tulika Mitra, National University of Singapore, SG
    
    -------------------------------------------------------------------------
    Organization
    -------------------------------------------------------------------------
    ESWeek General Chairs:
    Jörg Henkel, KIT Karlsruhe, DE (General Chair)
    Lothar Thiele, Swiss Federal Institute of Technology, Zurich, CH (Vice General Chair)
    ESWeek Local Arrangement Chair:
    Alex K. Jones, University of Pittsburgh, US
    
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  4. RAW 2016 - CALL FOR PAPERS - Paper Abstract Deadline Extended to January 15th
    ====================================================================

    Highlights: Deadline extension, 3 keynote speakers, social event, best paper award and journal special issue for the highest ranked papers.

    23rd Reconfigurable Architectures Workshop
    May 23-24, 2016
    Chicago, Illinois USA

    Website: http://raw.necst.it/

    Important Dates:
    Abstract submission: January  4, 2016   Extended to January 15, 2016
    Submission deadline: January  8, 2016  Extended to January 20, 2016
    Decision notification:February 12, 2016
    Camera-Ready papers due: February 26, 2016


    News:

    Advance Program:
    May 23, 2016:
    • Keynote speech by Peter Hofstee, IBM, Austin, TX, USA
    • Social event sponsored by TOPIC Embedded Products
    May 24, 2016:
    • Keynote speech by Patrick Lysaght, Xilinx, San Jose, CA, USA
    • Keynote speech by Rieny Rijnen, TOPIC Embedded Products, Eindhoven, the Netherlands


    The 23rd Reconfigurable Architectures Workshop (RAW 2016) will be held in Chicago, Illinois USA in May 2016. RAW 2016 is associated with the 30th IEEE International Parallel & Distributed Processing Symposium (IPDPS 2016) and is sponsored by the IEEE Computer Society Technical Committee on Parallel Processing. The workshop is one of the major meetings for researchers to present ideas, results, and on-going research on both theoretical and practical advances in Reconfigurable Computing.

    A reconfigurable computing environment is characterized by the ability of underlying hardware architectures or devices to rapidly alter (often on the fly) the functionalities of their components and the interconnection between them to suit the problem at hand. The area has a rich theoretical tradition and wide practical applicability. There are several commercially available reconfigurable platforms (FPGAs and coarse-grained devices) and many modern applications (including embedded systems and HPC) use reconfigurable subsystems. An appropriate mix of theoretical foundations and practical considerations, including algorithms architectures, applications, technologies and tools, is essential to fully exploit the possibilities offered by reconfigurable computing. The Reconfigurable Architectures Workshop aims to provide a forum for creative and productive interaction for researchers and practitioners in the area.

    Authors are invited to submit manuscripts of original unpublished research in all areas of reconfigurable systems, including architectures, algorithms, applications, software and cross-cutting areas.

    Topics of interest include, but are not limited to:

    Reconfigurable Systems & Applications:
    · Reconfigurable Accelerators (HPC, Bioinformatics, Acceleration Applications in Finance, Data Mining, Big Data, and Analytics)
    · Embedded systems and Domain-Specific solutions (Digital Media, Gaming, Automotive applications)
    · FPGA-based MPSoC and Multicore
    · Distributed Systems and Networks
    · Wireless and Mobile Systems
    · Emerging applications (Organic Computing, Biology-Inspired Solutions)
    · Critical issues (Security, Energy efficiency, Fault-Tolerance)

    Architectures & Algorithms:
    · Theoretical Interconnect and Computation Models
    · Algorithmic Techniques and Mapping
    · Run-Time Reconfiguration Models and Architectures
    · Emerging Technologies (optical models, 3D Interconnects, devices)
    · Bounds and Complexity Issues
    · Analog Arrays

    Software & Tools:
    · Operating Systems and High Level Synthesis
    · High-Level Design Methods (Hardware/Software Co-design, Compilers)
    · System Support (Soft Processor Programming)
    · Runtime Support
    · Reconfiguration Techniques (Reusable Artifacts)
    · Simulations and Prototyping (Performance Analysis, Verification Tools)


    Submission Guidelines:
    All manuscripts will be reviewed by at least three members of the program committee. Submissions should be a complete manuscript or, in special cases, may be a summary of relevant work. The manuscript should be not exceed 8 single-spaced, double-column pages using 10-point size font on 8.5X11 inch pages (IEEE conference style) including references, figures and tables. Papers are to be submitted through EDAS. Submitted papers should not have appeared in or be under consideration for a different workshop, conference or journal. It is also expected that all accepted papers (regular or poster) will be presented at the workshop by one of the authors.

    Publication:
    IEEE CS Press will publish the IPDPS symposium and workshop abstracts as a printed volume. The complete symposium and workshop proceedings will also be published by IEEE CS Press as a CD-ROM disk and will be available in the IEEE Digital Library.
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  5. EXTENDED SUBMISSION DEADLINE
    ----------------------------------------------------


    CALL FOR PAPERS
    ===============

    10-th Workshop on Embedded Systems Security (WESS 2015)
    A Workshop of the Embedded Systems Week (ESWEEK 2015)
    October 8, 2015
    Amsterdam, The Netherlands


    About WESS
    ——————————
    Embedded computing systems are continuously adopted in a wide range of 
    application areas and importantly, they are responsible for a large 
    number of safety-critical systems as well as for the management of 
    critical information. The advent of the Internet-of-Things introduces 
    a large number of security issues: the Internet can be used to attack 
    embedded systems and embedded systems can be used to attack the Internet. 
    Furthermore, embedded systems are vulnerable to many attacks not relevant
    to servers because they are physically accessible. Inadvertent threats 
    due to bugs, improper system use, etc. can also have effects that are 
    indistinguishable from malicious attacks.

    This workshop will address the range of problems related to embedded 
    system security. Of particular interest are security topics that are 
    unique to embedded systems. The workshop will provide proceedings to 
    the participants and will encourage discussion and debate about embedded 
    systems security.

    Topics of Interest
    ——————————————————
    * Trust models for secure embedded hardware and software
    * Isolation techniques for secure embedded hardware, hyperware and software
    * System architectures for secure embedded systems
    * Hardware security
    * Metrics for secure design of embedded hardware and software
    * Security concerns for medical and other applications of embedded systems
    * Support for intellectual property protection and anti-counterfeiting
    * Specialized components for authentication, key storage and key generation
    * Support for secure debugging and troubleshooting
    * Implementation attacks and countermeasures
    * Design tools for secure embedded hardware and software
    * Hardware/software co-design for secure embedded systems
    * Specialized hardware support for security protocols 
    * Efficient and secure implementation of cryptographic primitives

    Submission Instructions
    ———————————————————————
    The proceedings of the workshop will be published by the ACM. Papers must be 
    submitted in PDF form through the EASYCHAIR system. Submitted papers should 
    present original research that is unpublished and not submitted elsewhere. 
    Papers should be at least 4 pages long in 2-column ACM format. Although 
    typical papers are 4-6 pages long, camera ready papers can be up to 10 pages.
    Templates for the submission of papers can be found at the ACM website. 
    To submit a paper refer to http://www.wess-workshop.org

    Important Dates
    ———————————————
    Paper submission deadline:           July 15, 2015   ***EXTENDED
    Author notification:                 August 18, 2015
    Camera ready papers due:             September 1, 2015
    Copyright forms due:                 September 1, 2015
    Workshop date:                       October 8, 2015
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  6. CALL FOR PAPERS
    ===============

    10-th Workshop on Embedded Systems Security (WESS 2015)
    A Workshop of the Embedded Systems Week (ESWEEK 2015)
    October 8, 2015
    Amsterdam, The Netherlands


    About WESS
    ——————————
    Embedded computing systems are continuously adopted in a wide range of
    application areas and importantly, they are responsible for a large
    number of safety-critical systems as well as for the management of
    critical information. The advent of the Internet-of-Things introduces
    a large number of security issues: the Internet can be used to attack
    embedded systems and embedded systems can be used to attack the Internet.
    Furthermore, embedded systems are vulnerable to many attacks not relevant
    to servers because they are physically accessible. Inadvertent threats
    due to bugs, improper system use, etc. can also have effects that are
    indistinguishable from malicious attacks.

    This workshop will address the range of problems related to embedded
    system security. Of particular interest are security topics that are
    unique to embedded systems. The workshop will provide proceedings to
    the participants and will encourage discussion and debate about embedded
    systems security.

    Topics of Interest
    ——————————————————
    * Trust models for secure embedded hardware and software
    * Isolation techniques for secure embedded hardware, hyperware and software
    * System architectures for secure embedded systems
    * Hardware security
    * Metrics for secure design of embedded hardware and software
    * Security concerns for medical and other applications of embedded systems
    * Support for intellectual property protection and anti-counterfeiting
    * Specialized components for authentication, key storage and key generation
    * Support for secure debugging and troubleshooting
    * Implementation attacks and countermeasures
    * Design tools for secure embedded hardware and software
    * Hardware/software co-design for secure embedded systems
    * Specialized hardware support for security protocols
    * Efficient and secure implementation of cryptographic primitives

    Submission Instructions
    ———————————————————————
    The proceedings of the workshop will be published by the ACM. Papers must be
    submitted in PDF form through the EASYCHAIR system. Submitted papers should
    present original research that is unpublished and not submitted elsewhere.
    Papers should be no more than 10 pages 2-column in ACM format. Templates for
    the submission of papers can be found at the ACM website. To submit a paper

    Important Dates
    ———————————————
    Paper submission deadline:         July 3, 2015
    Author notification:               August 18, 2015
    Camera ready papers due:           September 1, 2015
    Copyright forms due:               September 1, 2015
    Workshop date:                     October 8, 2015



    Committees
    ===========

    Program Chairs
    ——————————————————
    S. Koubias (Univ. of Patras)
    T. Sauter (Donau University Krems)


    Program Committee
    ——————————————————
    D. Arora (Intel, USA)
    I.C. Bertolotti (PolitecnicoTorino, Italy )
    A. Bogdanov (KU Leuven, Belgium)
    B. Carbunar (FIU, USA)
    K. Dietrich (NXP Semiconductors, Austria)
    M. van Dijk (U. Connecticut, USA)
    D. Forte (U. Connecticut, USA)
    J. Groszschaedl (U. Luxemburg, Luxemburg)
    W. Kastner (TU Wien, Austria)
    F. Praus (FH Technikum Wien, Austria)
    S. Rajagopalan (Honeywell, USA)
    P. Schwabe (Radboud U. Nijmegen, Netherlands)
    N. Sklavos (TEI Epirus, Greece)
    M. Taha (Assiut U., Egypt)
    A. Treytl (Donau U. Krems, Austria)
    Y. Wang (I2R A*STAR, Singapore)


    Steering Committee
    ——————————————————
    C. Gebotys (U. Waterloo)
    D. Serpanos (QCRI)
    M. Wolf (Georgia Tech)
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  7. Call For Participation: ACM e-Energy 2015 (Early registration deadline: June 15th, 2015)

    ACM e-Energy 2015, the Sixth International Conference on Future Energy Systems.
    Bangalore, India, July 14-17, 2015
    http://conferences.sigcomm.org/eenergy/2015/

    The sixth ACM International Conference on Future Energy Systems (ACM e-Energy) aims to be the premier venue for researchers working in the broad areas of computing and communication for smart energy systems, and in energy-efficient computing and communication systems.
    In addition to a single track of full papers and challenge papers, the program includes keynote addresses by eminent researchers, workshops, panel discussions and posters and demos.

    Keynote Speakers:

    • Dr. Ashok Jhunjhunwala (Institute Professor at IIT Madras)
    • Prof. Iven Mareels (Dean of the School of Engineering, the University of Melbourne)
    • Bruce Nordman (Research Scientist, Lawrence Berkeley) 
    Important dates: 
    Early registration: June 15, 2015 (registration details at http://conferences.sigcomm.org/eenergy/2015/registration.php )
    Workshops: July 14, 2015

    Main conference: July 15-17, 2015 
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  8. Elsevier PHYCOM S.I. on D2D-based Offloading Techniques

    Submission deadline extended: July 6th, 2015 

    CFP webpage

    Scope of the Special Issue
    The Device-to-Device (D2D) communication paradigm was first proposed for cellular relaying, although it has been later proposed for a large variety of applications, such as opportunistic routing, peer-to-peer, content distribution, and cellular offloading. Indeed, the recent emergence of the D2D paradigm paves the way towards improving the performance of cellular networks by means of novel opportunistic architectures, e.g, based on LTE-Direct and WiFi-Direct technologies.
    This special issue will focus on theoretical research contributions presenting new techniques, concepts or analyses, and applied contributions reporting on experiences and experiments with D2D-based offloading systems. In particular, within the general framework of D2D communications and cellular offloading, we solicit manuscripts that present original and previously unpublished work on topics including, but not limited to, the following:
    • PHY/MAC architectures;
    • Opportunistic offloading;
    • Opportunistic medium access;
    • Spectrum management;
    • Resource optimization;
    • Energy minimization;
    • Security and privacy;
    • Interference management;
    • Coding and decoding methods;
    • MAC protocol coexistence;
    • Scheduling;
    • HetNets;
    • M2M communications;
    • Vehicular communications;
    • Content distribution architectures.

    Guest Editors
    Dr. Vincenzo Mancuso
    IMDEA Networks Institute
    vincenzo.mancuso@imdea.org
    Dr. Omer Gurewitz
    Ben Gurion University of the Negev
    gurewitz@cse.bgu.ac.il

    Submission Format and Guideline
    All submitted papers must be clearly written in excellent English and contain only original work, which has not been published by or is currently under review for any other journal or conference. Papers must not exceed 25 pages (one-column, at least 11pt fonts) including figures, tables, and references. A detailed submission guideline is available as “Guide to Authors” at: http://www.elsevier.com/journals/physical-communication/1874-4907/guide-for-authors

    All manuscripts and any supplementary material should be submitted through Elsevier Editorial System (EES). The authors must select as “D2D OFFLOADING” when they reach the “Article Type” step in the submission process. The EES website is located at: http://ees.elsevier.com/phycom
    All papers will be peer-reviewed by three independent reviewers. Requests for additional information should be addressed to the guest editors.


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  9. CFP webpage

    Scope of the Special Issue
    The Device-to-Device (D2D) communication paradigm was first proposed for cellular relaying, although it has been later proposed for a large variety of applications, such as opportunistic routing, peer-to-peer, content distribution, and cellular offloading. Indeed, the recent emergence of the D2D paradigm paves the way towards improving the performance of cellular networks by means of novel opportunistic architectures, e.g, based on LTE-Direct and WiFi-Direct technologies.
    This special issue will focus on theoretical research contributions presenting new techniques, concepts or analyses, and applied contributions reporting on experiences and experiments with D2D-based offloading systems. In particular, within the general framework of D2D communications and cellular offloading, we solicit manuscripts that present original and previously unpublished work on topics including, but not limited to, the following:
    • PHY/MAC architectures;
    • Opportunistic offloading;
    • Opportunistic medium access;
    • Spectrum management;
    • Resource optimization;
    • Energy minimization;
    • Security and privacy;
    • Interference management;
    • Coding and decoding methods;
    • MAC protocol coexistence;
    • Scheduling;
    • HetNets;
    • M2M communications;
    • Vehicular communications;
    • Content distribution architectures.
    Timelines
    Submission deadline:  May 31, 2015
    Acceptance deadline: September 30, 2015
    Publication: December 2015 

    Guest Editors
    Dr. Vincenzo Mancuso
    IMDEA Networks Institute
    vincenzo.mancuso@imdea.org
    Dr. Omer Gurewitz
    Ben Gurion University of the Negev
    gurewitz@cse.bgu.ac.il

    Submission Format and Guideline
    All submitted papers must be clearly written in excellent English and contain only original work, which has not been published by or is currently under review for any other journal or conference. Papers must not exceed 25 pages (one-column, at least 11pt fonts) including figures, tables, and references. A detailed submission guideline is available as “Guide to Authors” at: http://www.elsevier.com/journals/physical-communication/1874-4907/guide-for-authors

    All manuscripts and any supplementary material should be submitted through Elsevier Editorial System (EES). The authors must select as “D2D OFFLOADING” when they reach the “Article Type” step in the submission process. The EES website is located at: http://ees.elsevier.com/phycom
    All papers will be peer-reviewed by three independent reviewers. Requests for additional information should be addressed to the guest editors.


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  10. ACM SIGBED is delighted to announce the winner of the 2014 ACM SIGBED Paul Caspi Memorial Dissertation Award:


    Arjun Radhakrishna
    IST Austria

    for his thesis

    Quantitative Specifications for Verification and Synthesis

    The winner has been chosen from a total of 6 nominations. The selection committee found the winning thesis to be an outstanding contribution to the emerging field of quantitative formal reasoning in systems development.

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